Lead Engineer, 3D Integration & Advanced Packaging

Quantum Motion

ABOUT THE ROLE AND TEAM Quantum Motion is a fast-growing quantum computing scale-up based in London. We are developing quantum processors based on industrial-grade silicon chips, with the potential to radically transform computing power in areas such as materials modelling, medicine, artificial intelligence and more.  OUR TEAM Since 2021 our team has been listed every year in the “Top 100 Startups worth watching” in the EE Times, and our technology breakthroughs have been featured in The Telegraph, BBC and the New Statesman. Our founders are internationally renowned researchers from UCL and Oxford University who have pioneered the development of qubits and quantum computing architectures. Our chairman is the co-founder of Cadence and Synopsys, the two leading companies in the area of Electronic Design Automation. We’re backed by a team of top-tier investors, and we have recently closed our Series C funding of $160 million. We bring together the brightest quantum engineers, integrated circuit (IC) engineers, quantum computing theoreticians and software engineers to create a unique, world-leading team, working together closely to maximise our combined expertise. Our collaborative and interdisciplinary culture is an ideal fit for anyone who thrives in a cutting-edge research and development environment focused on tackling big challenges and contributing to the development of scalable quantum computers based on silicon technology. Our team of 100+ is based in Oxford and London, with a centre of mass in our Islington lab. FUNCTIONS OF THE ROLE We are hiring a Lead QPU Design Engineer to lead end-to-end design execution for silicon spin qubit quantum processor units (QPUs) and test vehicles, from concept through tapeout. This is a unique opportunity to work at the boundary between quantum physics and semiconductor engineering, exploring new device concepts while building industry-standard infrastructure for manufacturability. This is a hybrid hands-on execution and team leadership role. You will personally implement critical work (layout or simulation, depending on your background) while defining standards, running reviews, and managing a complementary team. We are open to candidates whose primary expertise is in layout or simulation. You must have working fluency in the other, enough to review critically and integrate effectively.  Functions of the Role  * Translate qubit architecture requirements into manufacturable physical designs: gate layouts, bias networks, and multi-qubit interconnects.  * Define connectivity/schematic capture and generate netlists for circuit simulation and LVS verification. * Own tapeouts, including readiness reviews, verification, risk management. * Execute critical design work in your domain (layout or simulation); review and integrate the other. * Collaborate with experimentalists and the device modelling team to refine designs and device models based on fabrication constraints and simulation results. * Define design workflows, standards, toolchains, and guide PDK and DFT development. * Lead and mentor the QPU Design team. EXPERIENCE - ESSENTIALS * PhD or equivalent experience in EE, physics, or a related field. * 8+ years in experimental hardware within research-adjacent environments industry environments. * Led hardware from concept through tapeout with personal accountability. * Deep expertise in one domain with fluency in the either domain: * Layout-first: custom physical design of block- and chip-level layouts using Cadence Virtuoso or similar. * Hands-on DRC/LVS/extraction. * Personally owned tapeouts. * Worked with sim teams, ran basic TCAD/EM, debugged layout via sim. * Simulation-first: EM/electrostatic/circuit modeling using relevant tools such as Ansys (HFSS/Q3D), Keysight ADS, Cadence Spectre, Synopsys Sentaurus, or equivalent. * Validated models against measured data. * Iterated on layouts, understand best practices and DRC constraints, constructively critiqued layout decisions. * Understanding of semiconductor device physics. * Built processes, mentored engineers, and integrated across physics/sim/layout. EXPERIENCE - DESIRABLE * Silicon spin qubit, quantum dot, or superconducting qubit experience. * Understanding of CMOS process integration, 3D integration and/or advanced packaging. * Microwave circuit design experience. * Scripting (Python, SKILL, Tcl) for design automation. * Experience correlating simulations with low-temperature measurements. BENEFITS * Be part of a creative, world-leading team * Competitive salary and share options scheme * Contributory pension scheme * Group private medical insurance scheme * Life Assurance * Cycle-to-work Scheme  * Central London location EEO STATEMENT Quantum Motion is committed to providing equal employment opportunity and does not discriminate based on age, sex, sexual orientation, gender identity, race, colour, religion, disability status, marital status, pregnancy, gender reassignment or any other protected characteristics covered by the Equality Act 2010.

Graphcore

ABOUT GRAPHCORE At Graphcore, we’re building the future of AI compute. We’re a team of semiconductor, software and AI experts, with deep experience in creating the complete AI compute stack - from silicon and software to infrastructure at datacenter scale. As part of the SoftBank Group, backed by significant long-term investment, we are delivering key technology into the fast-growing SoftBank AI ecosystem.To meet the vast and exciting AI opportunity, Graphcore is expanding its teams around the world. We are bringing together the brightest minds to solve the toughest problems, in a place where everyone has the opportunity to make an impact on the company, our products and the future of artificial intelligence. JOB SUMMARY We are seeking a Senior Semiconductor Reliability Engineer to lead reliability strategy and execution across advanced silicon nodes and advanced packaging technologies, spanning both pre-silicon and post-silicon phases. This role is responsible for ensuring robust product reliability from technology selection and design enablement through silicon bring-up, qualification, and high-volume manufacturing. The successful candidate will work at the intersection of device physics, circuit design, packaging, and manufacturing, providing technical leadership on reliability risk assessment, modeling, qualification, and failure analysis for complex, high-performance devices. THE ROLE As a Senior Reliability Engineer, you will lead reliability strategy and qualification activities for advanced AI silicon and package technologies. You’ll work across pre-silicon analysis, post-silicon qualification, and failure analysis, partnering closely with silicon, packaging, manufacturing, and quality teams. This role combines deep technical expertise with cross-functional leadership and offers the opportunity to influence reliability methodology for cutting-edge AI hardware platforms. ---------------------------------------------------------------------------------------------------------------------------------- RESPONSIBILITIES AND DUTIES * Define reliability requirements for advanced silicon nodes and package platforms * Perform pre-silicon reliability risk assessments across silicon, interconnect, and package technologies * Evaluate reliability mechanisms including EM, TDDB, BTI, HCI, BEOL, and silicon-package interaction * Support design reviews, guard-banding, and reliability sign-off activities * Develop and execute qualification plans aligned with JEDEC and customer requirements * Lead HTOL, thermal cycling, thermal shock, and reflow qualification testing * Drive correlation between pre-silicon modelling and post-silicon qualification results * Lead root-cause analysis of silicon and package-related failures * Utilize X-ray and CSAM analysis to diagnose package defects including delamination, voiding, and cracking * Work with foundries, OSATs, and reliability labs to resolve reliability and manufacturing issues * Author qualification reports, risk assessments, and reliability documentation * Mentor engineers and contribute to reliability best practices and methodologies ---------------------------------------------------------------------------------------------------------------------------------- CANDIDATE PROFILE ESSENTIAL * Bachelor’s or Master’s degree in Electrical Engineering, Materials Science, Physics, Mechanical Engineering, or related field * 8+ years of semiconductor reliability engineering experience * Strong understanding of silicon reliability mechanisms including EM, TDDB, BTI, and HCI * Experience with BEOL, interconnect, and advanced package reliability * Hands-on experience with HTOL, thermal cycling, thermal shock, and reflow testing * Experience using X-ray and CSAM for package failure analysis * Familiarity with JEDEC reliability standards * Strong analytical, communication, and cross-functional collaboration skills DESIRABLE * Experience with leading-edge nodes, AI accelerators, or high-performance SoCs * Knowledge of HBM, chiplets, TSVs, micro-bumps, and 2.5D/3D integration * Experience with wafer-level reliability or system-level stress testing * Experience working with foundries and OSAT partners * Technical leadership or mentoring experience ---------------------------------------------------------------------------------------------------------------------------------- BENEFITS In addition to a competitive salary, Graphcore offers flexible working, a generous annual leave policy, private medical insurance and health cash plan, a dental plan, pension (matched up to 5%), life assurance and income protection. We have a generous parental leave policy and an employee assistance programme (which includes health, mental wellbeing, and bereavement support). We offer a range of healthy food and snacks at our central Bristol office and have our own barista bar! We welcome people of different backgrounds and experiences; we’re committed to building an inclusive work environment that makes Graphcore a great home for everyone. We offer an equal opportunity process and understand that there are visible and invisible differences in all of us. We can provide a flexible approach to interview and encourage you to chat to us if you require any reasonable adjustments. We are able to provide visa sponsorship or support for visa applications

QuantWare

ABOUT US QuantWare is building the world’s most powerful quantum processors to solve humanity's greatest challenges. We do this with our unique VIO™ technology, the only QPU architecture that breaks the hardware barriers that have held quantum computing back, unlocking the path to MegaQubit quantum processors. With VIO, we are paving the way for the hyper-scale quantum computers that will change the world. And delivering on that vision demands people who don’t shy away from tackling the hardest challenges of our time. That’s where you come in! As a 3D Packaging & Tooling Engineer, you won't just be running a recipe, you will be the lead architect for how our VIO products are physically realized. You will take high-precision assembly machines and push them beyond their factory specs to handle novel 3D architectures and the precise tolerances required for optimal device performance. What you'll be doing * Tooling Adaptation: Lead the modification and customization of high-precision assembly equipment (e.g., flip-chip bonders, die attaches) to meet unique quantum 3D integration requirements. * Advanced Process Development: Develop sub-micron placement and bonding processes (thermo-compression bonding, laser-assisted bonding, coldwelding) for non-standard substrates. Lead the evaluation of glues, adhesives, and solder materials. You will determine which materials can meet our alignment requirements while surviving the extreme thermal cycling and vacuum conditions of a dilution refrigerator. * Non-Standard 3D Assembly: Design and execute "out-of-the-box" integration strategies, including multi-die stacking, interposer-based 3D architectures, and orthogonal (vertical) chip placement. * Vendor Management: Interface directly with equipment manufacturers to drive co-development of specialized hardware. Your Profile * Education: BS/MS/PhD in Mechanical Engineering, Mechatronics, Physics, or Materials Science. * Deep Tooling Fluency: 7+ years of hands-on experience with high-accuracy semiconductor assembly platforms. You are the person who knows which bolts to turn and which sensors to override to get the results you need. * Precision Assembly Expertise: Proven track record of achieving <1µm (or even <0.5µm) placement accuracy in a production or R&D environment. * 3D Integration Knowledge: Deep understanding of 3D integration (TSVs, micro-bumps, or Interposers) and how these structures behave under thermal stress. Experience with materials (solders, underfills, adhesives) that must remain stable in high-vacuum or cryogenic environments. * Education: BS/MS/PhD in Mechanical Engineering, Mechatronics, Physics, or Materials Science.   Don't tick every box? Apply anyway. We know great candidates don't always follow a straight path, and we value diverse experience, perspectives, and ways of thinking. If this role excites you and you believe you can make an impact, we'd love to hear from you! What We Offer: At QuantWare, you’ll be part of a high-performing team of world-class experts in an ambitious, fast-moving environment. From day one, you’ll have the trust, tools, and support to do your best work. Here’s what you can expect: Competitive salary - A salary that reflects the impact and importance of the role (and of course 8% holiday allowance) Pension that’s built to last - A generous and future-proof pension plan that includes partner and dependent coverage. Flexibility built on trust - We focus on outcomes. Work flexibly, in a hybrid setup, with an open vacation policy that lets you manage your time Personal growth - We invest in your L&D, with a budget available to each team member, dependent on their individual ambitions, development needs, and performance A connected team - We make space to celebrate wins together, with team events, offsites, and spontaneous moments that bring us closer Diversity & Inclusion at QuantWare We’re an ambitious company, not only for our goals but also to become an even more diverse and inclusive team. We know this helps us with better decisions, more innovation, and strengthens our culture. In particular, we’d love to see more women in the quantum industry! So if you’re a female talent, excited about this opportunity but don’t meet every single requirement, we still encourage you to apply. As part of our recruitment process, candidates may be required to undergo pre-employment screening.