Full-Stack Engineer, Office of the CEO

Arago

MEET ARAGO AND THE ARAGONIANS Arago is an AI and computer hardware company whose mission is to drive the course of history forward. We do so by accelerating breakthroughs at the intersection of AI and semiconductors. Founded in 2024 by AI researchers and physicists with deep expertise in photonics, electronics, software, mathematics, and machine learning, Arago brings together a lean team of engineers and scientists from the world’s top companies and research labs. Composed of nine nationalities and operating from hubs in France, North America, and Israel, we believe in great science and fast achievements. Our work is guided by these core principles: 1. Do great things: we deliver work we’re proud to sign our name to. 2. High velocity: speed matters. We move quickly, one step at a time. 3. One unit: we’re all in this together, with relationships grounded in trust, respect, and camaraderie. Arago is backed by executives from Apple, Arm, Nvidia, Microsoft, and Hugging Face, as well as prominent US and European deeptech venture firms and exited founders. WHAT YOU’LL DO Design and verify custom digital hardware components and architectures that enable high-performance, tightly integrated computation workloads and interface Arago’s custom tensor unit for advanced AI/ML applications. RESPONSIBILITIES * Design, implement, and verify RTL blocks for memory, control, and compute subsystems within Arago’s custom multiphysics computation unit. * Collaborate with Arago’s system software and architecture teams to define block-level specifications and ensure alignment with performance and integration goals. * Develop and maintain functional verification infrastructure to validate design correctness across simulation and hardware testbenches. * Support synthesis, timing analysis, and backend integration, working closely with Arago’s physical design and CAD engineers. * Contribute to architectural exploration and hardware-software co-design efforts to shape future iterations of Arago’s compute platform. REQUIRED SKILLS AND EXPERIENCE * Extensive experience in RTL design (Verilog/SystemVerilog) for control logic, datapaths, memory subsystems, and specialized processing units. * Strong understanding of digital architecture, including pipelining, arbitration, memory hierarchy, and system-level integration. * Proficiency in functional verification, including testbench development, assertions, coverage metrics, and debugging (UVM experience is a plus). * Familiarity with ASIC and FPGA design flows, including synthesis, timing closure, and DFT. * Comfortable working across the full hardware stack — from architectural specification and microarchitecture to physical implementation support. * Language: English at a proficient level. French is a plus. PAY AND BENEFITS * Competitive cash compensation, with final package based on location, experience, and the pay of team members in similar positions. * Meaningful stock option plan offered at the earliest stage of the company (included in the majority of full time offers). * Relocation bonus and coverage of moving expenses for relocation within 20 minutes of the company’s location. * Healthcare coverage (including family-friendly options), pension contributions, professional development support, and 25 days of PTO, in addition to public holidays. * Ownership of a key technical domain, with significant vertical and/or horizontal growth opportunities, based on performance and individual drive. * Reimbursement of 50% of the public transport subscription fee. * A high-paced, multicultural (with 9 nationalities), and engineering-led environment. OUR HIRING PROCESS: YOUR JOURNEY TO ARAGO * Screening Call : Get to know you beyond your CV. * Technical meeting : Deep dive into your past projects and technical achievements. * CEO Interview : Assess the fit with the team’s culture and long-term vision. * Reference Calls: Mandatory calls with your former managers to validate strengths, weaknesses, and work style. * Technical Assessment: Take-home technical assignment crafted to the role you’re applying for. * Final Interview : Discuss your technical assignment and address any remaining questions with team members.

Arago

MEET ARAGO AND THE ARAGONIANS Arago is an AI and computer hardware company whose mission is to drive the course of history forward. We do so by accelerating breakthroughs at the intersection of AI and semiconductors. Founded in 2024 by AI researchers and physicists with deep expertise in photonics, electronics, software, mathematics, and machine learning, Arago brings together a lean team of engineers and scientists from the world’s top companies and research labs. Composed of nine nationalities and operating from hubs in France, North America, and Israel, we believe in great science and fast achievements. Our work is guided by these core principles: 1. Do great things: we deliver work we’re proud to sign our name to. 2. High velocity: speed matters. We move quickly, one step at a time. 3. One unit: we’re all in this together, with relationships grounded in trust, respect, and camaraderie. Arago is backed by executives from Apple, Arm, Nvidia, Microsoft, and Hugging Face, as well as prominent US and European deeptech venture firms and exited founders. WHAT YOU’LL DO As a Drivers & Virtualization Engineer, you will own the host-facing software boundary of Arago’s accelerator. Your mission is to ensure our hardware is accessible, secure, and performant across diverse environments—ranging from bare-metal deployments to complex virtualized and multi-device cloud infrastructures. You will focus on building robust kernel-level interfaces where correctness, isolation, and long-term operational safety are paramount. REQUIRED SKILLS AND EXPERIENCE * Master’s or PhD degree in Computer Science, Computer Engineering, or a related field. * Deep knowledge of OS internals, particularly kernel memory management and I/O paths. * Strong understanding of memory safety requirements in kernel space. * Proven hands-on experience in Linux kernel driver development and kernel modules. * Solid understanding of virtualization fundamentals (KVM, hypervisors). * Practical experience with emulation frameworks, specifically QEMU internals or custom device models. * Familiarity with hardware-level protocols: PCIe, DMA, MMIO, and IOMMU. * Language: English at a proficient level. French is a plus. RESPONSIBILITIES * Develop and maintain high-performance Linux kernel drivers for Arago’s proprietary accelerator. * Implement communication protocols and virtual device interfaces to bridge hardware and software. * Manage low-level hardware interactions including PCIe, DMA, MMIO, and interrupt handling. * Enable seamless virtualized access to accelerators using QEMU and KVM. * Design and implement robust device sharing, passthrough, and isolation mechanisms. * Ensure the security of accelerator operations through strict memory protection and resource isolation. * Debug complex failures that span the entire stack: from hardware and kernel to hypervisor and guest OS. * Support the scaling of our architecture from single-device setups to large-scale multi-device deployments. PAY AND BENEFITS * Competitive cash compensation, with final package based on location, experience, and the pay of team members in similar positions. * Meaningful stock option plan offered at the earliest stage of the company (included in the majority of full time offers). * Relocation bonus and coverage of moving expenses for relocation within 20 minutes of the company’s location. * Healthcare coverage (including family-friendly options), pension contributions, professional development support, and 25 days of PTO, in addition to public holidays. * Ownership of a key technical domain, with significant vertical and/or horizontal growth opportunities, based on performance and individual drive. * Reimbursement of 50% of the public transport subscription fee. * A high-paced, multicultural (with 10 nationalities), and engineering-led environment. OUR HIRING PROCESS: YOUR JOURNEY TO ARAGO * Screening Call : Get to know you beyond your CV. * Technical meeting : Deep dive into your past projects and technical achievements. * CEO Interview : Assess the fit with the team’s culture and long-term vision. * Reference Calls: Mandatory calls with your former managers to validate strengths, weaknesses, and work style. * Technical Assessment: Take-home technical assignment crafted to the role you’re applying for. * Final Interview : Discuss your technical assignment and address any remaining questions with team members.

Arago

MEET ARAGO AND THE ARAGONIANS Arago is an AI and computer hardware company whose mission is to drive the course of history forward. We do so by accelerating breakthroughs at the intersection of AI and semiconductors. Founded in 2024 by AI researchers and physicists with deep expertise in photonics, electronics, software, mathematics, and machine learning, Arago brings together a lean team of engineers and scientists from the world’s top companies and research labs. Composed of nine nationalities and operating from hubs in France, North America, and Israel, we believe in great science and fast achievements. Our work is guided by these core principles: 1. Do great things: we deliver work we’re proud to sign our name to. 2. High velocity: speed matters. We move quickly, one step at a time. 3. One unit: we’re all in this together, with relationships grounded in trust, respect, and camaraderie. Arago is backed by executives from Apple, Arm, Nvidia, Microsoft, and Hugging Face, as well as prominent US and European deeptech venture firms and exited founders. WHAT YOU’LL DO As a Senior Signal Processing Engineer, you sit at the intersection of our physical and digital layers, translating hardware reality into mathematical clarity. You will work hands-on with the optics, analog, and digital teams to co-optimize the design of our compute engine. You're a strong fit if C/C++ is your primary tool and your background spans environments such as telecom, high-speed sensing, optimal control, signal processing, or related fields. REQUIRED SKILLS AND EXPERIENCE * Experience: Minimum 5 years of experience in relevant industries (telecom, high-speed sensors, optimal control, signal processing, or related fields). * Programming: Extensive experience in C/C++ and Python. * Education: Major in Mathematics, Physics, or Informatics with deep expertise in numerical analysis, optimization, and mathematical modeling. * Systems Modeling: Strong ability to identify and model dominant sources of variability, noise, and distortion using both analytical tools and numerical simulations. * Problem Solving: A high level of curiosity and a "first principles" approach to solving non-standard problems in hardware-software co-design. * Language: English at a proficient level. French is a plus. RESPONSIBILITIES * Collaborate with optics, analog, and digital teams to deduce how low-level hardware decisions affect final chip characteristics and AI model performance. * Design and build proprietary internal tools for faithful simulations and hardware optimization. * Analyze the impact of physical noise and signal distortion on system performance, creating mathematical frameworks to mitigate these effects. * Develop models that predict the behavior of light-matter interaction within our architecture to guide the digital and analog design teams. * Drive the mathematical validation of our architecture, ensuring that every design choice is backed by rigorous numerical proof. PAY AND BENEFITS * Competitive cash compensation, with final package based on location, experience, and the pay of team members in similar positions. * Meaningful stock option plan offered at the earliest stage of the company (included in the majority of full time offers). * Relocation bonus and coverage of moving expenses for relocation within 20 minutes of the company’s location. * Healthcare coverage (including family-friendly options), pension contributions, professional development support, and 25 days of PTO, in addition to public holidays. * Ownership of a key technical domain, with significant vertical and/or horizontal growth opportunities, based on performance and individual drive. * Reimbursement of 50% of the public transport subscription fee. * A high-paced, multicultural (with 10 nationalities), and engineering-led environment. OUR HIRING PROCESS: YOUR JOURNEY TO ARAGO * Screening Call : Get to know you beyond your CV. * Technical meeting : Deep dive into your past projects and technical achievements. * CEO Interview : Assess the fit with the team’s culture and long-term vision. * Reference Calls: Mandatory calls with your former managers to validate strengths, weaknesses, and work style. * Technical Assessment: Take-home technical assignment crafted to the role you’re applying for. * Final Interview : Discuss your technical assignment and address any remaining questions with team members.