Sökresultat för "System-on-Chip (SoC)"

Company description: Ericsson AB Job description: Join our Team About This Opportunity Join our innovative team to use your expertise and elevate your ASIC verification to the next level within Ericsson. We specialize in the top-level verification of cutting-edge ASICs that power complex, high-performance systems. Integrated multi-chip-modules are replacing monolithic solutions. Our designs hold several hundreds of processor cores, DSPs as well as ARM cores, tailored hardware accelerator IPs and many high-speed interfaces, including Ethernet, CPRI, and PCIe. As an ASIC Top-Level Verification Engineer, you'll be part of a team tackling some of the most challenging verification tasks in the industry, ensuring that our ASICs meet our high standards for performance, functionality, and security.   You will play an important role in the team developing software driven tests run in CI regressions on our four platforms, SystemC/TLM simulation, RTL simulation, hardware emulation, and eventually on Silicon.   What You Will Do Bring ASIC designs into hardware emulators for pre-silicon verification and prepare tests for ASIC silicon prototype bring-ups Drive development of hybrid environments where the ASIC is split between an emulator and TLM/SystemC Develop transactors for hybrid environments Manage emulation regressions and support teams in resolving testcase issues Maintain and update existing emulator platforms Define strategies and collaborate across teams using hardware emulators Contribute to software-driven test development written in C, with debugging via EDA simulation tools, SW debuggers, and hybrid environments   The Skills You Bring Essential: Experience building hardware emulation environments using Siemens Veloce, Cadence Palladium, or Synopsys Zebu Solid RTL debugging skills in SystemVerilog or VHDL C programming skills for ASICs or embedded software Desired: HW/SW co-debugging using SW debuggers for C-code on multi-core ASIC designs Debugging experience on HW emulators and/or Silicon Experience simulating and debugging on SystemC/TLM platforms Education: Master's degree in Computer Engineering, Electrical Engineering, or related field

Do you want to work with the core of a global tech company's business? How would it feel to be in a team that verifies that one thing our product portfolio depends on? With us in the ASIC verification team, you will be able to do just that! We are now looking for passionate senior engineers to join our group of dedicated and competent ASIC Verification Engineers! The ASIC Verification Team Our team is responsible for pre-silicon verification of the in-house developed hardware IPs and subsystems. We take pride in delivering top-quality work using the latest verification techniques. As a team member, you will have ample opportunities to learn and grow in a creative and collaborative environment. Axis has a long history of developing integrated circuits for our products. The series of ARTPEC chips is a cornerstone in most Axis products, as discussed here: Axis System-On-Chip, and ARTPEC-9. The ASIC department is currently working on developing the 10th generation of the ARPTEC SoC using the most modern chip technology available. See also The history of ARTPEC. The ASIC verification team ensures that the ARTPEC chips are working correctly, before they materialize into an actual chip. To do this, we use simulation as well as formal methods. Verifying complex chip designs requires the use of specialized and advanced techniques. The team is relatively small and you will have the possibility to work with a wide variety of tasks and hardware modules. As we work with agile methods, you will be part of a group that collaborates closely to meet our goals. Who do we look for? We are looking for an experienced engineer with at least three years of experience in ASIC verification. We assume that your main focus has been Coverage-driven Constrained Random Verification using SystemVerilog and UVM, on module and/or sub-system levels. We hope you have a keen interest in programming. We regularly implement and maintain efficient software tools that are essential for our verification process. These tools are mostly done in Python. You enjoy sharing your knowledge and ideas with co-workers. You want to be part of a competent and creative team that loves to solve problems together, and we are sure that we are that team! Bonus points for Formal verification, including e.g. connectivity checking and formal property verification Programming in Python, C, C++ or SystemC Transaction Level Modeling (TLM) Note: If you have recently graduated from a M.Sc. programme with relevant focus, feel free to put in your application for a junior position in the team. Your role We emphasize continuous growth of expertise and responsibilities for each team member, and the team as a whole. Part of this requires continuously following new developments in ASIC verification since this field continues to develop rapidly. Work tasks may therefore include investigating new verification technologies or evaluating new tools. Depending on personal interest, there are opportunities to write papers and present at international conferences. Our verification flow and environments are quite advanced. Developing and maintaining them requires a good understanding of digital hardware as well as software engineering principles. In particular, we make extensive use of object-oriented frameworks. Debugging and identifying potential problems in the hardware design is also a fundamental part of the job. Our in-house developed hardware often implements functions such as image processing, graphical transforms, general AI and computer vision. As a verification engineer, you will have the opportunity to grow your knowledge related to such algorithms. Ready to act? We hope you are really inspired by the job description and found a potential match! We are looking forward to receiveing your application! If you have any questions, get in touch with Per Dagermo, Engineering Manager for the ASIC Verification team, at +46 46 272 1800. We review applications continuously so don´t wait to send in your application! This recruitment is handled solely by Axis Communications AB, and we politely but firmly decline all calls from recruitment and consulting companies regarding this position

Xenergic is a high-tech semiconductor company providing cutting edge high-speed, low-power embedded memory IP solutions in advanced technology nodes. These memories are targeted for market segments ranging from IoT and mobile applications to high-end servers and AI accelerators. We are looking for a highly motivated and talented Analog Design Engineer with a proven track record in analog design to join our team and design the next generation of embedded memory solutions. As an Analog Designer, you will work closely with a team of talented engineers and contribute to the development of next-generation products. The key responsibilities include: design of leaf cells under tight area and integration constraints, porting of physical designs between technologies, optimization of blocks for EMIR mitigation, test chip design finishing on the DRC/LVS level, simulation and verification of designs, top level IP integration within SoC and any other step towards realizing the memory IP. Supporting customers and representing the company in trade shows and customer meetings can happen from time to time. The position requires tight collaboration with other team members from layout, analog, digital and coding teams. The following are a mandatory requirement: MSc. in EE or related fields At least 3 years experience in analog design in IC domain including layout design and simulation Fluent in English both in writing and speaking. Good communication skills and ability to work in a team. Ability to drive complex tasks autonomously. The following competences are not mandatory but would be beneficial: Experience with advanced technology nodes such as single digit finFET is a big advantage. Understanding of memory design and system level integration. Experience with chip level DRC/LVS. Experience with SoC verification and measurement. EMIR-aware layout design concepts. Understanding of the impact of layout on post-layout parasitics. Scripting skills (python, shell); SKILL is a big plus. Communication in Swedish. Are you the one we are looking for? We want to hear from you! Send your application (CV and cover letter) to career@xenergic.com.