Principal Power & Performance Validation Engineer

Graphcore

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software, and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers, and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary Reporting to the Validation leadership team, the Principal Execution and Quality Validation Engineer will be responsible for driving validation execution, automation, product quality, and release readiness across Graphcore silicon and platform technologies. The role combines deep expertise in hardware validation, test automation, and quality engineering with a strong focus on execution excellence. Working closely with architecture, design, verification, firmware, software, systems engineering, and validation teams, the successful candidate will develop scalable validation methodologies, improve test coverage and execution efficiency, and ensure products meet the highest standards of functionality, reliability, and performance before customer deployment. As a recognized technical leader within the validation organisation, this role will influence validation strategies, automation roadmaps, and quality practices across multiple projects and engineering disciplines. The Team The Validation Execution and Quality team sits within the Validation organisation and is responsible for improving validation effectiveness, test execution efficiency, product quality, and release readiness across Graphcore silicon and platform products. The team develops validation methodologies, automation frameworks, test execution infrastructure, and quality processes that enable engineering teams to execute validation activities at scale. Working closely with validation, architecture, firmware, software, systems, and design teams, the group helps ensure products are thoroughly validated before release. Responsibilities and Duties * Define and drive validation strategies for complex silicon, subsystem, and platform technologies, ensuring comprehensive coverage across functional, performance, reliability, and stress testing  * Leverage advanced hardware knowledge to plan, optimize, verify, and test critical electronic systems, including silicon, FPGA-based platforms, test systems, and associated validation infrastructure  * Develop and execute validation plans that ensure products meet quality, reliability, and performance objectives before release  * Create detailed test plans from high-level validation requirements and test cases, ensuring timely execution and high-fidelity results  * Design, develop, and maintain automation frameworks that enable rapid execution of test plans, regression suites, and validation activities  * Lead silicon and platform validation activities from bring-up through product readiness  * Conduct complex analysis of validation results and system behaviour to identify issues and opportunities for improvement  * Collaborate with architecture, design, verification, firmware, software, systems engineering, and validation teams to implement new validation requirements and improve test coverage  * Integrate new validation capabilities, methodologies, and test solutions into existing validation infrastructure to improve productivity, quality, and execution efficiency  * Develop automated data collection, analysis, and reporting solutions to improve engineering visibility and decision-making  * Evaluate complex design features to identify functional, compatibility, integration, and reliability risks  * Investigate and drive resolution of complex validation failures through structured debug and root-cause analysis methodologies  * Assess validation techniques, workflows, and engineering processes, introducing automation and process improvements to maximize productivity  * Support power, performance, and system-level validation activities through development of scalable validation infrastructure and methodologies  * Influence validation roadmaps, infrastructure development, and engineering best practices across the validation organisation  * Act as the final validation authority for assigned areas, ensuring issues are identified and resolved before products reach customers  * Drive continuous improvement initiatives that improve validation quality, execution efficiency, and engineering productivity  * Mentor engineers on validation methodologies, automation frameworks, test execution strategies, and quality practices  Candidate Profile Essential: * Strong experience in silicon validation, hardware validation, system validation, or related engineering disciplines  * Deep understanding of validation methodologies, test planning, test execution, and quality processes  * Strong experience developing automation frameworks for validation, regression execution, and test orchestration  * Expert-level Python programming skills for automation, data analysis, and infrastructure development  * Strong understanding of hardware systems, silicon bring-up, and validation workflows  * Experience translating high-level requirements into structured validation plans, test cases, and measurable quality outcomes  * Experience analysing validation results and driving root-cause investigations for complex technical issues * Strong understanding of validation coverage, quality metrics, release readiness criteria, and risk assessment methodologies  * Experience collaborating across architecture, design, verification, firmware, software, systems, and validation teams  * Excellent analytical, diagnostic, and problem-solving skills  * Exceptional communication skills and the ability to influence technical direction across multidisciplinary engineering teams  * Ability to independently lead complex technical initiatives and drive adoption of new validation methodologies and tools  Desirable * Experience with post-silicon bring-up and system integration activities  * Experience developing large-scale regression systems and automated test execution infrastructure  * Experience with FPGA-based validation environments  * Experience automating laboratory equipment and validation environments  * Familiarity with CI/CD systems and continuous testing methodologies  * Experience developing dashboards, reporting systems, or engineering analytics tools  * Experience with C, C++, or embedded software development  * Experience working on AI accelerator, high-performance compute, or semiconductor products  * Experience defining organisational validation standards, quality metrics, and engineering best practices

Graphcore

ABOUT US Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. JOB SUMMARY Reporting to senior leadership within Architecture and Validation, the Debug Validation Lead will drive post-silicon debug and validation activities for next-generation AI compute silicon and systems. The role is responsible for leading teams focused on identifying, reproducing, analysing and resolving complex silicon, firmware and system-level issues during bring-up, characterization and product readiness. This position combines deep technical debugging expertise with strong cross-functional collaboration across multiple engineering disciplines. The role will work closely with architecture, RTL, firmware, software and systems teams to improve debug methodologies, accelerate issue resolution and strengthen validation coverage. The role will work closely with architecture, RTL, firmware, software, systems and platform teams to improve debug methodologies, accelerate issue resolution and strengthen validation coverage. THE TEAM The Post-Silicon Debug and Validation team sits within the Architecture and Validation organisation and is responsible for bring-up, debug and validation of Graphcore silicon and systems. The team works across the full product lifecycle, supporting first silicon bring-up, subsystem validation, system integration and production readiness activities. Engineers collaborate closely with hardware, firmware, software and systems teams to investigate complex failures, develop debug methodologies and improve validation infrastructure. RESPONSIBILITIES AND DUTIES * Lead post-silicon debug and validation activities for AI compute silicon and platform technologies * Contribute to debug and validation activities across multiple projects and milestones * Drive prioritisation, planning and execution of debug and validation activities across multiple projects and milestones * Investigate and resolve complex silicon, firmware, software and system-level issues during bring-up and validation * Develop structured debug methodologies and failure analysis processes to improve issue resolution efficiency * Collaborate closely with architecture, RTL, firmware, software and systems engineering teams to identify root causes and implement corrective actions * Drive debug of CPU, memory, interconnect and high-speed I/O subsystems under functional, stress and workload conditions * Develop and enhance automated debug, regression and validation infrastructure using Python and related technologies * Analyse logs, traces, telemetry and hardware data to isolate and characterize system failures and performance issues * Support development of validation tests, debug tooling and custom diagnostics to improve coverage and observability * Define validation metrics, debug workflows and reporting standards to ensure consistent and repeatable analysis * Drive continuous improvement of debug processes, validation methodologies and engineering workflows * Communicate technical risks, status and recommendations clearly to engineering leadership and cross-functional stakeholders * Support silicon readiness reviews and contribute to product quality and release decisions * Contribute to continuous improvement of debug methodologies, validation infrastructure and engineering workflows CANDIDATE PROFILE ESSENTIAL: * Strong experience in bare metal environments * Good knowledge of SoC and platform architectures * Expertise in debug infrastructure and post-silicon debug methodologies * Strong programming skills in Python, C, or debug scripting languages such as CMM * Highly motivated self-starter with a collaborative and team-oriented approach * Ability to work across teams and programming languages to identify root causes of deep and complex issues * Experience of the post-silicon validation process applied in digital ASIC environments * Strong Linux and Python experience * Exceptional communication skills and the ability to collaborate effectively to solve complex problems * Excellent problem-solving, analytical and diagnostic skills * Deep knowledge of scan, DFT, JTAG and trace infrastructure * Strong debug skills including fault tree analysis, failure isolation, fishbone methodologies and system-level debug techniques * Ability to work independently on technically complex debug and validation activities across hardware, firmware and software domains DESIRABLE * Understanding of DFT flows from insertion through post-silicon validation * Experience developing tooling for parsing and analysing debug data, including scan dump parsing * Driver-level experience with one or more of the following technologies: * PCIe * Ethernet * Memory technologies including LPDDR, DDR and HBM * Peripheral interfaces such as I2C, I3C and SPI * Experience using CoreSight and similar debug infrastructure including CTI, ETx, DStream, JLink, Lauterbach, ATB and STM * Good knowledge of mixed-signal building blocks such as PLLs, high-speed PHYs and IC control/communication protocols * Experience with Arm CPU architectures, system IP and associated debug tooling * Experience with AMBA protocols * Understanding of ML applications and associated workloads * Experience in characterization, failure analysis, test development, statistical analysis and customer support

Graphcore

Principal Embedded SW/FW Engineer (Bringup) - Bengaluru, multiple vacancies  Job Summary We have an exciting opportunity to be part of a collaborative, cross-functional development team validating cutting-edge, high-performance AI chips and platforms.  You will play a key role in supporting new product introductions and post-silicon validation.   Working within the Post-Silicon Validation team, you will be involved with bringing first silicon to life, functionally validating it and working closely with many other teams to help it become a fully characterised and working product, reporting project status/progress to program management on a regular basis. You will have the opportunity to provide technical guidance to other engineering team members. In this role, you can leverage our experience and industry knowledge to architect and drive implementation of continuous improvements to test infrastructure and processes.   The Team The Post-Silicon Bringup team sits within the Architecture and Validation team, we are responsible for bringup and validation of new silicon when it returns from manufacture, enabling and supporting the production SW and FW teams to bring up their software and supporting the Silicon Characterisation team.   Responsibilities and Duties * Plan, design, develop and debug silicon validation tests in bare metal C/C++ on FPGA/Emulator prior to first silicon * Deploy silicon validation tests on first silicon and debugging them * Develop automated test framework and regression test suites in Python to optimize validation efficiency * Collaborate closely with engineers from many other disciplines on a variety of topics * Work with Validation and Production Test engineering peers to implement best practices and continuous improvements to test methodologies * Analyse test results, identify and debug failures/defects * Contribute to shared test and validation infrastructure * Provide feedback to architects   Candidate Profile  Essential: * Understanding of ML applications and their workloads * A self-starter who can apply independent judgement * A team player able to lead and support colleagues with difficult concepts * Strong experience in Bare metal / embedded C/C++ * Excellent problem-solving, analytical & diagnostic skills * Ability to work across teams and programming languages to find root causes of critical and complex issues * Experience of the post-silicon validation process applied in digital ASIC environments * Python, Linux * Excellent communication skills and the ability to explain difficult concepts to resolve issues    Desirable * 10+ years  experience  * Experience building and leading, multi-site teams * Driver level experience with one or more of the following is highly desirable: * PCIe * Ethernet * Memory technologies (LPDDR, DDR, HBM, …) * Other peripherals such as I2C, I3C, SPI, … * Good knowledge of mixed-signal building blocks such as PLLs, high speed PHYs and IC control/communication protocols is highly desirable. * Experience of Arm CPUs, System IP and debug tools. * Experience of AMBA protocols. * Experience in Characterization, Failure Analysis, Test Development, Statistical analysis,