Senior/Staff Silicon Physical Design Engineer

Senior/Staff Engineer - Logical Design

Axelera AI

About Us Axelera AI is not your regular deep-tech startup. We are creating the next-generation AI platform to support anyone who wants to help advancing humanity and improve the world around us. In just four years, we have raised a total of $370 million and have built a world-class team of 220+ employees (including 49+ PhDs with more than 40,000 citations), both remotely from 18 different countries and with offices in Belgium, France, Switzerland, Italy, the UK, headquartered at the High Tech Campus in Eindhoven, Netherlands. We have also launched our Metis™ AI Platform, which achieves a 3-5x increase in efficiency and performance, and have visibility into a strong business pipeline exceeding $100 million. Our unwavering commitment to innovation has firmly established us as a global industry pioneer. Are you up for the challenge? Position Overview As a Senior or Staff Logical Design Engineer, you will join a team responsible for the micro-architecture, implementation and execution of in-house designed AI products. Your role will be critical in achieving the highest level of quality and performance as well as ensuring continued innovation in both design and design flow. This is an opportunity to work with cutting-edge technology and a dedicated team of professionals who share your passion for pushing the boundaries of what's possible. Key responsibilities: * Collaborate with cross-functional teams to clarify and comprehend intricate design specifications and requirements. * Architect and implement advanced micro-architectures from high-level specifications for silicon components, adhering to performance, power, and area (PPA) metrics. * Employ industry-standard design tools and methodologies to fashion and optimize digital logic circuits. * Conduct block and system-level RTL coding, ensuring optimal performance, power, and area (PPA) metrics. * Integrate various IPs/Sub IPs into the top-level SoC. * Perform static checks (lint, cdc, equivalence checks) to enhance the quality of the RTL. * Automate tasks using scripting for efficiency gains. * Undertake comprehensive functional verification and collaborate closely with verification engineers to ensure the correctness of the design. * Actively engage in design reviews, contributing technical expertise to enhance overall design quality. * Work collaboratively with physical design engineers to address design-for-manufacturability (DFM) and design-for-test (DFT) considerations. Qualifications / skills Education: A degree in electronics engineering, electrical engineering or computer science or other relevant discipline. Experience: A minimum of 5 years of experience and proven expertise in silicon logical design, with a successful track record in RTL coding and synthesis, digital design, SoC, and integration of 3rd-party IPs (PCIe, LPDDR), with fluency in Verilog. Expertise: Mastery of industry-standard Electronic Design Automation (EDA) tools for design and verification. Deep understanding of intricate digital design principles, covering clock domain crossing, low-power design, and timing closure. Scripting: Proficiency in scripting languages such as Python, shell or Tcl for automation. Collaboration / Team Player: Demonstrated ability to work closely with architecture, verification, physical design and software teams to ensure comprehensive verification coverage. Problem Solving: Strong analytical and problem-solving skills. Communication: Excellent written and verbal communication skills in English. Comfortable working with a team spread across 15 countries. Location We offer a flexible working arrangement, with options to: * Work from one of our Axelera AI offices (Leuven in Belgium, Amsterdam and Eindhoven in the Netherlands, Zurich in Switzerland, Florence and Milan in Italy or Bristol in the United Kingdom) if you're already based in the vicinity. * Work fully remotely from any European country (incl. the UK) you are already in. * Relocate with us and work from Italy (Florence or Milan) or the Netherlands (Amsterdam or Eindhoven). What we offer  This is your chance to shape and be part of a dynamic, fast-growing, international organization. We offer an attractive compensation package, including a pension plan, extensive employee insurances and the option to get company shares.    An open culture that supports creativity and continual innovation is awaiting you. Collaborative ownership and freedom with responsibility is characteristic for the way we act and work as a team.  At Axelera AI, we wholeheartedly embrace equal opportunity and hold diversity in the highest regard. Our steadfast commitment is to cultivate a warm and inclusive environment that empowers and celebrates every member of our team. We welcome applicants from all backgrounds to join us in shaping the future of AI.

Staff/Senior QPU Layout Engineer

Quantum Motion

ABOUT THE ROLE AND TEAM As a Staff/Senior QPU Layout Engineer, you will drive the physical implementation and verification for a cutting-edge quantum processor platform. You’ll be a go-to expert for full-chip and block-level layouts, ensuring designs are reliable, manufacturable, and ready for tapeout.  You will be hands-on with layout while also contributing to the transition from research prototypes to production using industry-standard semiconductor tools and processes.You should enjoy solving problems with solutions flexible to changing rules while maintaining engineering discipline. The role involves collaborating closely with experimentalists, device modellers, and designers, bridging research and industry-standard approaches. It is not a conventional IC layout role: our process is bespoke and evolving, requiring flexibility and strong problem-solving. However, it’s grounded in industrial tools and practices and thus best suited to those with a strong industry foundation.  OUR TEAM Since 2021 our team has been listed every year in the “Top 100 Startups worth watching” in the EE Times in 2021 and 2022, and our technology breakthroughs have been featured in The Telegraph, BBC and the New Statesman. Our founders are internationally renowned researchers from UCL and Oxford University who have pioneered the development of qubits and quantum computing architectures. Our chairman is the co-founder of Cadence and Synopsys, the two leading companies in the area of Electronic Design Automation. We’re backed by a team of top-tier investors, and we have recently closed our Series C funding of $160 million.   We bring together the brightest quantum engineers, integrated circuit (IC) engineers, quantum computing theoreticians and software engineers to create a unique, world-leading team, working together closely to maximise our combined expertise. Our collaborative and interdisciplinary culture is an ideal fit for anyone who thrives in a cutting-edge research and development environment focused on tackling big challenges and contributing to the development of scalable quantum computers based on silicon technology.   Our team of 100+ is based across London, Oxford, San Sebastián and Sydney, with our primary hub in Islington (London). FUNCTIONS OF THE ROLE * Implement block-level and chip-level physical layouts for spin qubits in SiMOS quantum dots from concept through integration and tapeout using standard EDA tools. * Drive layout work to completion using industry best practices to ensure manufacturability and scalability. * Deliver layouts that meet agreed physical verification and sign-off criteria, and own tapeout readiness. * Interpret EM analysis, adjusting layouts to meet reliability and integration goals. * Create or adapt minimal schematics or netlists to support LVS and verification flows. * Contribute to the definition and maintenance of PDKs, layout methodologies, conventions, and abstractions. * Lead design reviews, tapeout planning, and technical documentation. * Coach or manage layout engineers as the team grows. * Collaborate closely with interdisciplinary teams, translating research intent into manufacturable layouts. EXPERIENCE - ESSENTIALS * Masters in Engineering, Physics, or related field, or equivalent professional experience. * 6+ years leading chip layouts through tapeout in research-driven or novel technology environments. * Strong proficiency with Cadence Virtuoso for full-chip and block-level layout and verification flows. * Strong understanding of layout verification (DRC/LVS/ERC) using Calibre or equivalent. * Experience interpreting EM simulation results to optimise layout for signal integrity and reliability. * Proven ability to execute layouts evolving process nodes where formal design rules are incomplete and engineering judgment drives signoff decisions. * Track record of effective cross-functional collaboration across disciplines and domains. EXPERIENCE - DESIRABLE * Experience with quantum devices, CMOS process integration, and/or 3D integration. * Experience developing PDKs, rule decks, or working closely with EDA teams. * Scripting or automation experience (SKILL, Python, or similar). * Experience managing a small team of layout engineers. BENEFITS * Be part of a creative, world-leading team * Competitive salary and share options scheme * Contributory pension scheme * Group private medical insurance scheme * Life Assurance EEO STATEMENT Quantum Motion is committed to providing equal employment opportunity and does not discriminate based on age, sex, sexual orientation, gender identity, race, colour, religion, disability status, marital status, pregnancy, gender reassignment or any other protected characteristics covered by the Equality Act 2010.

Senior Quantum Engineer

Quantum Motion

ABOUT THE ROLE AND TEAM The Intelligent Automation Team develops the software that controls, and optimises our Quantum Processing Units. Working in close partnership with the Quantum Hardware Team, this group works to enable our processors to perform at their limits. Their work transforms raw quantum hardware into a usable platform by leveraging traditional software engineering alongside machine learning and other optimisation techniques. Together, these teams form the engine room of Quantum Motion’s technology, bridging physics, engineering, and computation to unlock the next generation of quantum capability. As a member of our evolving scale-up, you’ll help shape the next stage of quantum computing. We’re still a small team, which means your expertise will directly influence our technology, our culture, and our trajectory, while giving you room to grow as we scale. OUR TEAM This role forms part of our investment in state-of-the art facilities in Maryland, US. It reflects our commitment to driving innovation and collaborating with some of the brightest minds in the quantum industry, and additionally taps into the strong semiconductor and cryogenic ecosystem. Our mission is global and this is a rare and exciting opportunity to join a team which is shaping the future of quantum computing.     As part of our lean, high-impact and rapidly growing team, you will be working closely with our scientists, engineers and experts in a dynamic environment to make the site run smoothly and compliantly from day one, dedicated to contributing to the development of scalable quantum computers based on silicon technology. FUNCTIONS OF THE ROLE * Work with experimental experts to benchmark and optimise quantum processors based on spins in silicon quantum dots * Develop automated calibration routines for long term maintenance of QPU performance * Devise measurement and analysis roadmaps to test and optimise quantum operations EXPERIENCE - ESSENTIALS * PhD degree in physics, chemistry, or engineering                     * Proven track record of leadership in dynamical characterisation and control of spin qubits  in solid-state systems  * Experience in defining research goals and leading teams toward successful technical outcomes                      * Familiar with the use of high-frequency electronics         * Knowledge of quantum information systems and operations * Ability to independently design and carry out complex experiments; perform data analysis and preparation of technical reports and presentations                 * Knowledge of data acquisition software (Python, Matlab)                     * Ability to lead and motivate a team * Exceptional ability to communicate complex technical strategies to stakeholders, write grant applications, and author technical reports EXPERIENCE - DESIRABLE * Strong experience with machine learning techniques and their application to complex physical systems. * Demonstrated capability in benchmarking quantum systems using methods such as randomised benchmarking and gate-set tomography. * Proven team leadership and people-management skills, including supervising technical staff and guiding cross-functional research efforts. * Experience mentoring junior researchers and effectively supervising research students to support their academic and professional development. * Skilled in the simulation of spin-based quantum systems and the dynamical characterisation of silicon-based nanoelectronic devices. * Hands-on experience operating and troubleshooting deep cryogenic measurement systems.             * Experience with the dynamical characterisation silicon-based nanoelectronic devices * Ability to supervise research students BENEFITS * Be part of a creative, world-leading team * Competitive salary and share options scheme * Region-specific benefits (e.g. Health Insurance) * Choose your own laptop/kit  * Flexible working * Located in Maryland College Park - a state-of-the-art quantum hub  EEO STATEMENT Quantum Motion is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, protected veteran status, age, pregnancy, genetic information, or any other characteristic protected by applicable federal, state, or local laws.