RF Hardware Engineer

ABOUT US Harmattan AI is a next-generation defense prime building autonomous and scalable defense systems. Following the close of a $200M Series B, valuing the company at $1.4 billion, we are expanding our teams and capabilities to deliver mission-critical systems to allied forces. Our work is guided by clear values: building technologies with real-world impact, pursuing excellence in everything we do, setting ambitious goals, and taking on the hardest technical challenges. We operate in a demanding environment where rigor, ownership, and execution are expected. ABOUT THE ROLE As an FPGA Radio Engineer, you will be responsible for designing and implementing the communications link between our drones and ground stations. You will work closely with our hardware and embedded software teams, taking full end-to-end ownership of the RF signal-processing pipeline - from early architecture through to production-ready deployment. This role is ideal for a highly autonomous engineer who is comfortable making system-level decisions and driving them forward in a fast-paced, demanding environment. RESPONSIBILITIES * Lead the architecture and design of low-latency FPGA-based communications pipelines, spanning the entire signal chain: modulation/demodulation (e.g., OFDM, QAM), FFT, channel coding and decoding (e.g., LDPC, Turbo, Viterbi), synchronization, equalization, and link adaptation. * Own the complete FPGA development cycle, from feasibility assessment and architectural decisions to RTL implementation, simulation, verification, and deployment of robust, production-ready designs. * Conduct system-level link budget analysis, waveform simulations, and performance modeling to validate design choices and assess real-world performance under noise, interference, and multipath conditions. * Design and maintain comprehensive testbenches and validation frameworks for complex DSP pipelines, including hardware-in-the-loop testing with real RF front-ends. * Work closely with RF hardware engineers to ensure seamless integration between FPGA designs and the analog front-end (ADC/DAC interfaces, AGC, frequency planning). * Evaluate and select FPGA platforms, IP cores, and toolchains based on project constraints such as latency, throughput, power consumption, and long-term scalability. * Define and document clear, well-specified interfaces between the FPGA, embedded software, and hardware layers. CANDIDATE REQUIREMENTS * Master’s degree (or equivalent) in Electrical Engineering, Signal Processing, Telecommunications, or a related field. * Over 5 years of hands-on FPGA development experience, including end-to-end ownership using VHDL and/or Verilog/SystemVerilog. * Strong foundation in digital communications and signal processing, grounded in first principles. * Solid understanding of the RF signal chain and its impact on digital design, including ADC/DAC interfaces, IQ imbalance, phase noise, dynamic range, sampling, and filtering. * Experience working in low-latency, real-time environments with strict resource constraints, making informed trade-offs among latency, precision, power consumption, and logic utilization. * Familiar with link budget analysis, waveform design, and system-level simulation tools. * Comfortable working autonomously, taking full technical ownership, and communicating effectively across hardware, software, and systems teams. * Fully dedicated to Harmattan AI’s mission, vision, and ambitious growth objectives, always prepared to go the extra mile to ensure operational excellence. We look forward to hearing how you can help shape the future of autonomous defense systems at Harmattan AI.

ABOUT US Harmattan AI is a next-generation defense prime building autonomous and scalable defense systems. Following the close of a $200M Series B, valuing the company at $1.4 billion, we are expanding our teams and capabilities to deliver mission-critical systems to allied forces. Our work is guided by clear values: building technologies with real-world impact, pursuing excellence in everything we do, setting ambitious goals, and taking on the hardest technical challenges. We operate in a demanding environment where rigor, ownership, and execution are expected. ABOUT THE ROLE As an FPGA Radar Engineer, you will help design and implement the real-time radar signal-processing pipeline that powers our drone sensing capabilities. You will work closely with hardware and embedded software engineers and be involved throughout the development cycle, from architecture and RTL implementation to integration and field validation. This role is ideal for an engineer with a strong background in DSP, practical FPGA experience, and a genuine interest in radar systems. RESPONSIBILITIES * Develop FPGA-based radar signal-processing pipelines, encompassing key stages such as pulse compression, Range/Doppler processing, CFAR detection, and target tracking handoff. * Contribute to the RTL implementation of radar waveform generation and reception, including both FMCW and pulsed waveforms. * Perform system-level radar simulations, including Range-Doppler maps, SNR modeling, clutter analysis, and assessment of detection performance under realistic conditions. * Write and maintain testbenches and validation frameworks tailored to radar processing chains, enabling rapid debugging and iteration. * Collaborate closely with RF and hardware engineers to ensure seamless integration between FPGA designs and the radar front end - including antenna, Tx/Rx modules, ADC/DAC interfaces, timing, and synchronization. * Document the interfaces between the radar processing core, system software, and hardware layers. CANDIDATE REQUIREMENTS * Master’s degree (or equivalent) in Electrical Engineering, Signal Processing, Applied Physics, or a related field. * At least 3 years of hands-on FPGA development experience, including practical work with radar or sonar signal processing (using VHDL and/or Verilog/SystemVerilog). * Strong working knowledge of radar signal processing fundamentals, including pulse compression, matched filtering, Range-Doppler processing, CFAR, and clutter rejection. * Familiarity with FMCW and pulsed radar architectures, including waveform generation and digital back-end processing on FPGA. * Solid foundation in DSP concepts: FFT, FIR/IIR filtering, windowing, fixed-point arithmetic, and precision management. * Experience with test benches development and hardware-in-the-loop validation. * Rigorous and collaborative, with the ability to work effectively across hardware, software, and systems teams. * 100% dedication to Harmattan AI’s mission, vision, and ambitious growth plans, ready to go the extra mile to ensure operational excellence. We look forward to hearing how you can help shape the future of autonomous defense systems at Harmattan AI.