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Master Thesis: AI‐Driven RF Inverse Design of Multi‐Layer EM structures

SCALINQ AB
  • OrtGöteborg
  • OmfattningHeltid
  • Sista ansökan30 dagar kvar
  • Publicerad21 okt.

Om tjänsten

SHAPE THE FUTURE OF QUANTUM COMPUTING: WRITE YOUR MASTER'S THESIS AT SCALINQ

Are you a Master's student in physics, engineering, or a related field with a passion for turning theory into reality? SCALINQ

offers a unique opportunity to conduct your thesis work at the cutting edge of quantum technology.

We believe that the most impactful work comes from a combination of academic curiosity and industrial application. That's why we

invite talented students to join our team, not just for a project, but for a chance to contribute to the core of our mission.

Why write your thesis with SCALINQ?

  • Solve Real Challenges: Work on problems that are critical to making quantum computers scalable and powerful. Your research will

have a direct application

Expert Mentorship: Be guided by our team of experienced scientists and engineers in the field
Access to State-of-the-Art Technology: Get hands-on experience in a dynamic, high-tech environment
  • A Pathway to a Career: A successful thesis project could be a stepping stone to a full-time role with us. We invest in talent

for the long term

We are looking for individuals who are:

Driven by curiosity and a desire to innovate
Collaborative, proactive, and eager to learn
Passionate about building the hardware or contributing in closely related areas that will power the quantum revolution

MASTER THESIS TOPIC: AI‐DRIVEN RF INVERSE DESIGN OF MULTI‐LAYER EM STRUCTURES

Suitable period: Jan 2027 - June 2027

Length: 30 credits (ECTS / hp)

Number of students (min/max): 1/2

Suitable student background: Artificial Intelligence, Complex Adaptive Systems, Computer Science, Electrical and Electronics

Engineering, Software Engineering

DESCRIPTION:

SUMMARY & OBJECTIVE

Microwave/RF components in cryo-quantum computing systems require compact size, high selectivity, and fast design cycles. Planar

2D pixelated layouts provide design flexibility, but their performance is constrained by single-layer physical limits. 3D

multi-layer structures solve this problem, but simulating and tuning 3D layouts manually is computationally heavy and

time-consuming.

This project, based on previous work in NN-assisted 2D pixelated LPF inverse design, explores the possibility to expand the design

space from single-layer to multi-layer EM structure. Combining RF engineering and computer science, we integrate deep generative

models with open-source EM solvers (EMerge, OpenEMS). The framework generates DRC-compliant, manufacturable layouts directly from

target RF specifications.

KEY VALUE:

Design Automation: Transitions filter design from manual trial-and-error to an automated "specs-in, layout-out" workflow.
  • Reusable Toolchain: Improve the open-source Python pipeline for batch simulation and AI inverse design that the team can reuse

for future projects.

  • Fabrication-Ready Output: Integrates manufacturing rules (DRC) directly into the generative model, producing optimized 3D

design (PCB filter with absorber or optimized transistor core)

TEAM STRUCTURE & DIVISION OF RESPONSIBILITIES

The workload is divided between two students based on their technical backgrounds to cover both electromagnetic modeling and AI

model implementation:

Student 1: RF Engineering Focus

  • Substrate & DRC Definition: Define substrate properties (e.g., Rogers 4350B), layer stack-up, via geometry, and manufacturing

DRC limits (trace width and clearance).

  • Baseline Design & Benchmarking: Design traditional multi-layer components manually (e.g., filter with absorber) to serve as a

performance benchmark for the AI model.

Computational EM & Data-Efficiency: Find a way to lower the EM computational cost in dataset generation.
  • Performance Analysis: Perform yield and sensitivity analysis on final layout candidates to evaluate performance variations

against manufacturing tolerances. Analyze E/H field distributions and resonant coupling mechanisms of the generated topologies

to explain the physical working principles behind the designs.

Student 2: Computer Science Focus

  • Simulation Automation Pipeline: Write Python scripts to parameterize multi-layer layout grids, run batch EM simulations in

parallel, and parse S-parameter data.

  • Neural Network Implementation: Build and train both the forward surrogate model (e.g., CNN/ResNet) and the inverse generative

network (e.g., Tandem/cVAE).

  • DRC Constraints & Layout Export: Implement connectivity checks and DRC penalty terms in PyTorch, and create the tool to export

final layouts to Gerber/DXF format.

(Optional) Potential integration of LLM: Deploy LLM to guide or even build the pipeline for the design workflow.

TECHNICAL APPROACH & WORKFLOW

The framework operates via a systematic two-phase pipeline designed for low computational latency and high reliability:

PHASE 1: TRAINING PHASE

1. Dataset Generation: The RF student sets up the multi-layer PCB templates (e.g., 2–4 layers on Rogers 4350B). The CS student

writes Python scripts to run batch simulations and extract the S-parameter data (S11,S21).

2. Model Training: The CS student trains the forward models and DRC-constrained inverse networks. The RF student reviews the

results to verify physical accuracy.

PHASE 2: INVERSE DESIGN PHASE

1. Layout Synthesis: Target S-parameters are fed into the trained model, which generates DRC-compliant 3D PCB layouts.

2. Validation & Export: The CS student automates the loop to verify these generated layouts in EMerge and export them. The RF

student benchmarks the final designs, comparing the footprint and selectivity of the 3D filters against traditional 2D

filters.

PROJECT SCOPE & BOUNDARIES

To keep the project feasible within the 4–5 month timeline, the scope is defined as follows:

  • Target Component: Focuses specifically on one or two demo components (e.g., transistor core for internal evaluation, passive

filter for thesis presentation).

Manufacturing Process: Limited to standard multi-layer PCB technology (2–4 layers).

About us

SCALINQ is a prominent player in the growing field of quantum computing. Our core focus is the development of

state-of-the-art cryogenic hardware. All our products are classified as enabling hardware and are vital for the overall

performance of a quantum computer. This could be your opportunity to play a key role in unlocking the full potential of a new tech

era.

The Team: At SCALINQ, diversity and inclusion are at the core of who we are. Our greatest strength lies in the people who shape

our company, each contributing their unique skills and perspectives. Together, we blend cutting-edge research expertise with

traditional engineering practices to develop innovative and commercially viable solutions. Joining our team means being part of a

dynamic environment where every contribution matters.

Join Us: If you think it sounds like fun please, apply by sending your resume and a cover letter. Remember to mark your

application with the title of the Master Thesis.

Krav- & nyckelordscheck

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